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Hua You (Intel)
| May 14, 2008 12:03 AM PDT Beta course module design document: Software Transactional Memory - feedbacks welcomed | ||||
1. Name Software Transactional Memory 2. Writer [Intel Confidential List] 3. Targeted availability June 30th, 2008 4. Brief Course Description This module is a one hour brief introduction to Transactional Memory (TM) technology. The target audience is those who have experience of parallel/concurrent programming and want to learn other synchronization alternatives to the lock mechanism. In this module, rationale of TM will first be introduced, followed by an explanation of key concept of operating principles. The discussion focus will be on Software TM, the software implementation of TM, in which software support (compiler and libraries) and language extensions (key words) are illustrated with some code examples. On the completion of this module, audience will understand why and how Transactional Memory works for concurrent programming with the basic knowledge of the language extension for Software Transactional Memory (STM). This will allow them to be able to try STM and decide on whether or not to use it for their applications. 5. Needs Analysis With multi-core processor platforms becoming mainstream, concurrent/parallel programming has grabbed more and more attention because its ability to release the full power of these processors. Yet successful concurrent/parallel programming requires practice and experience, regardless of the parallel programming techniques that have been developed for decades. Software transactional memory (STM) is a concurrency control mechanism analogous to database transactions for controlling access to shared memory in concurrent computing. It functions as an alternative to lock-based synchronization, and is typically implemented in a lock-free way. STM has recently been the focus of intense research and support for practical im
plementations has grown. This module is expected to brief the audience about that alternative for concurrent programming 6. Subject Matter Experts (SMEs) [Intel Confidential List] 7. Learner Analysis The ideal student for this module is an adult learner at a university, who in addition to exhibiting the learning characteristics of adult learners, has also the following traits:
Special notes for Faculty Training learners/attendees Faculty Training (FT) attendees are special cases wherein they likely have more experience than the usual target audience for this class, and, they have the immediate goal of teaching this class in a live classroom environment with targeted students. Ideal FT candidates for this material have the following traits:
Further, the course materials will use Intel® software tools to easily illuminate important concepts, but those concepts can be explained and exploited using many other tools. 8. Context Analysis The purpose of a Context Analysis is to identify and describe the environmental factors that inform the design of this module. The Environmental Factors for the module include: a. Media Selection i. No Tapes, CDs, or DVDs are available or provided ii. Electronic files are provided 1. Can be printed out for classroom use if desired 2. Lecture presentation is .PPT format a. includes instructor notes b. Learning Activities i. Lectures include optional demos for the instructor ii. Class Q+A c. Participan
t Materials and Instructor/Leader Guides i. There is a short Lecture presentation with this module 1. Minimal instructor notes are included in PPT Notes sections ii. An archive of class binaries, if no customized or student binaries are available d. Packaging and production of training materials i. Materials will be posted to Intel Curriculum Wiki, for worldwide use and alteration e. Training Schedule i. The module is 1 hour of lecture a. Class size is not restricted in any way by the course materials themselves f. Other References i.
White paper available at http://software.intel.com/en-us/articles/intel-c-stm-compiler-prototype-edition-20 9. Task Analysis The relevant Job/Task Analysis for this material is defined by the Software Engineering Body of Knowledge (SWEBOK) and can be viewed in detail here: The primary Bodies of Knowledge (BKs) used include, but are not limited to:
Relevant IEEE standards for relevant job activities include but are not limited to: Standards in Construction, Coding, Construction Quality IEEE12207-95 (IEEE829-98) IEEE Std 829-1998, IEEE Standard for Software Test Documentation, IEEE, 1998. (IEEE1008-87) IEEE Std 1008-1987 (R2003), IEEE Standard for Software Unit Testing, IEEE, 1987. (IEEE1028-97) IEEE Std 1028-1997 (R2002), IEEE Standard for Software Reviews, IEEE, 1997. (IEEE1517-99) IEEE Std 1517-1999, IEEE Standard for Information Technology-Software Life Cycle Processes- Reuse Processes, IEEE, 1999. (IEEE12207.0-96) IEEE/EIA 12207.0-1996//ISO/IEC12207:1995, Industry Implementation of Int. Std. ISO/IEC 12207:95, Standard for Information Technology-Software Life Cycle Processes, IEEE, 1996. 10. Concept Analysis Transactions; Operations of a Transaction (commit, validate, abort); 11. Learning Objectives i. Know the rationale behind Trans
actional Memory ii. Describe the major language extension of Software Transactional Memory iii. Apply STM to concurrent applications in place of more traditional synchronization. 12. Criterion Items Q. Name the operations of a transaction. A. Commit, Abort, Validate 13. Expert Appraisal SME demo walkthrough of material. Optional Webinar on the material may be completed; if so, the Webinar will be announced on the ISC Community Forum. 14. Developmental Testing Alpha by the end of May'08; final by end of June’08. 15. Production Presentation slides deck
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