Challenge

Implement the application-programming model for SSE3 Instructions. The application-programming environment for using SSE3 instructions is unchanged from that provided for Streaming SIMD Extensions (SSE) and Streaming SIMD Extensions 2 (SSE2).

Solution

Detect Support for MONITOR/MWAIT instructions and SSE3 Technology using CPUID. Support for MONITOR/MWAIT can be detected using the Monitor bit in the CPUID extended feature flags. In SSE3 instruction implementation, the MONITOR/MWAIT instructions are targeted for use by system software to support efficient thread synchronization. While application software may attempt to use MONITOR/MWAIT, both instructions may be explicitly disabled by either the OS or the BIOS. Disabling the instructions will clear the CPUID feature flag; this also causes MWAIT execution to generate an illegal opcode exception.

Detect SSE3 technology using CPUID. If an application attempts to use SSE3 instructions and the processor is not capable of using the new instructions, an Interrupt 6 is generated. To use SSE3 instructions, the following conditions must exist:

• CR4.OSFXSR = 1 (OS supports saving SSE/SSE2 state during context switches)

• CPUID.PNI = 1 (processor supports Prescott New Instructions technology)

An application can verify that SSE3 instructions are supported by using this code sequence:

boolean prescott_new_instructions_work = TRUE; 
try { 
IssuePrescottNewInstructions(); 
// Use ADDSUBPD 
} except (UNWIND) { 
// if we get here, Prescott New Instructions doesn't work 
prescott_new_instructions_work = FALSE; 
 

A separate item, How to Satisfy the System Programming Model for Streaming SIMD Extensions 3 Instructions (SSE3), is useful in conjunction with this one.

Source

Next Generation Intel® Processor: Software Developers Guide